Memory Embedded VLSI Gate Array Testing.

M. Shimizu N. Okino J. Nishiura H. Maruyama

Published in: ITC (1985)

Keyphrases

gate array
low power
logic circuits
low cost
embedded systems
power consumption
computing power
memory usage
high speed
software testing
real time
single chip
power dissipation
memory size
memory requirements
test data
limited memory
vlsi design
test set
low memory
data sets