Power-Management based on Reconfigurable Last-Cache level on Non-volatile Memories in Chip-Multi processors.
Furat Al-ObaidyArghavan AsadFarah MohammadiPublished in: CCECE (2019)
Keyphrases
- power management
- power consumption
- low cost
- embedded processors
- dynamic power management
- memory subsystem
- single chip
- multithreading
- main memory
- low power
- processor core
- energy consumption
- memory access
- data storage
- energy saving
- parallel computing
- high speed
- ibm power processor
- parallel algorithm
- parallel processing
- data center
- memory bandwidth
- energy efficiency
- memory hierarchy
- data structure
- data access
- digital libraries