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A 900-MHz, 3.5-mW, 8-bit Pipelined Subranging ADC Combining Flash ADC and TDC.
Kenichi Ohhata
Daiki Hayakawa
Kenji Sewaki
Kento Imayanagida
Kouki Ueno
Yuuki Sonoda
Kenichiro Muroya
Published in:
IEEE Trans. Very Large Scale Integr. Syst. (2018)
Keyphrases
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analog to digital converter
sigma delta
high speed
high frequency
data sets
neural network
information systems
case study
power consumption
single chip