Login / Signup

A dual-mode architecture for a phased-array receiver based on injection locking in 0.13µm CMOS.

Satwik A. PatnaikNarasimha LankaRamesh Harjani
Published in: ISSCC (2009)
Keyphrases
  • phased array
  • analog vlsi
  • radio frequency
  • low cost
  • object recognition
  • image data
  • lightweight