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Design of a unified transport triggered processor for LDPC/turbo decoder.
Shahriar Shahabuddin
Janne Janhunen
Muhammet Fatih Bayramoglu
Markku J. Juntti
Amanullah Ghazi
Olli Silvén
Published in:
ICSAMOS (2013)
Keyphrases
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design process
turbo codes
low complexity
single chip
ldpc codes
functional verification
image sequences
low density parity check