A Bit Plane Architecture For An Image Analysis Processor Implemented With P.L.C.A. Gate Array.

Jean-Claude Klein François Collange Michel Bilodeau

Published in: ECCV (1990)

Keyphrases

gate array
bit plane
image analysis
low power
logic circuits
low complexity
probability model
high speed
image coding
wavelet coefficients
transform domain
pattern recognition
image processing
computer vision
real time
low cost
bit planes
rate distortion
texture classification
image data
coding method
feature space