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Design Optimization for Process-Variation-Tolerant 22-nm FinFET-Based 6-T SRAM Cell with Worst-Case Sampling Method.

Sangheon OhChanghwan Shin
Published in: IEICE Trans. Electron. (2016)
Keyphrases
  • worst case
  • power consumption
  • data sets
  • computational complexity
  • lower bound
  • upper bound
  • process model
  • development process