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Power Aware and Delay Efficient Hybrid CMOS Full-Adder for Ultra Deep Submicron Technology.
Narasimha Rao Konijeti
J. V. R. Ravindra
Pandurangaiah Yagateela
Published in:
EMS (2013)
Keyphrases
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power dissipation
power consumption
low power
high speed
vlsi circuits
cmos technology
cost effective
nm technology
low cost
logic circuits
case study
data sets
power management
chip design
infrared
power supply
computer systems