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Pandurangaiah Yagateela
Publication Activity (10 Years)
Years Active: 2013-2013
Publications (10 Years): 0
Top Topics
Nm Technology
Chip Design
Power Dissipation
Vlsi Circuits
Top Venues
UKSim
EMS
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Publications
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J. V. R. Ravindra
,
Pandurangaiah Yagateela
,
Narasimha Prasad
A Novel Analytical Model for Analysis of Delay and Crosstalk in Non Linear RLC Interconnects for Ultra Low Power Applications.
UKSim
(2013)
Narasimha Rao Konijeti
,
J. V. R. Ravindra
,
Pandurangaiah Yagateela
Power Aware and Delay Efficient Hybrid CMOS Full-Adder for Ultra Deep Submicron Technology.
EMS
(2013)