On Design and Analysis of a Feasible Network-on-Chip (NoC) Architecture.

Jun Ho Bahn Seung Eun Lee Nader Bagherzadeh

Published in: ITNG (2007)

Keyphrases

network on chip
packet switched
multi processor
power dissipation
routing algorithm
hardware design
design process
computer networks
network simulator
image processing
web services
power consumption
embedded systems
simulation environment
single chip