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A Simple Circuit Approach to Reduce Delay Variations in Domino Logic Gates.
Gaetano Palumbo
Melita Pennisi
Massimo Alioto
Published in:
IEEE Trans. Circuits Syst. I Regul. Pap. (2012)
Keyphrases
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logic circuits
high speed
modal logic
artificial intelligence
case study
database
artificial neural networks
delay insensitive