A State-Serial Viterbi Decoder Architecture for Digital Radio on FPGA.
Mihail PetrovManfred GlesnerPublished in: FPT (2005)
Keyphrases
- fpga implementation
- hardware implementation
- real time
- low complexity
- pipelined architecture
- hardware architectures
- hardware architecture
- hardware design
- wireless communication
- state space
- hidden markov models
- management system
- noisy channel
- wireless sensor networks
- software architecture
- high speed
- low cost
- decoding process
- fpga device
- systolic array