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Design of high-speed wireline transceivers for backplane communications in 28nm CMOS.
Jafar Savoj
Kenny C.-H. Hsieh
Parag Upadhyaya
Fu-Tai An
Jay Im
Xuewen Jiang
Jalil Kamali
Kang Wei Lai
Zhaoyin Daniel Wu
Elad Alon
Ken Chang
Published in:
CICC (2012)
Keyphrases
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high speed
design process
low power
circuit design
single chip
case study
cmos image sensor
database
real time
neural network
learning algorithm
information systems
image processing
image sequences
design methodology