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A Scalable Area-Efficient Low-Delay Asynchronous AER Circuits Design for Neuromorphic Chips.
Siyuan Ouyang
Keji Zhou
Hao Jiang
Chenyang Li
Jinhao Liang
Fangduo Zhu
Xumeng Zhang
Qi Liu
Published in:
IEEE Trans. Circuits Syst. II Express Briefs (2024)
Keyphrases
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high level synthesis
high speed
low delay
circuit design
computer vision
vector quantization
step size
shift register