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Automatic technique of distortion compensation in resistor ladder for high-speed and low-power ADC.
Wataru Yoshimura
Kenichi Ohhata
Published in:
IEICE Electron. Express (2014)
Keyphrases
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low power
high speed
single chip
low cost
power consumption
cmos technology
high power
real time
wireless transmission
logic circuits
vlsi architecture
low power consumption
vlsi circuits
digital signal processing
gate array
mixed signal
ultra low power
wide dynamic range
motion estimation