Sign in
A 72-Port 10G Ethernet Switch/Router Using Quasi-Delay-Insensitive Asynchronous Design.
Mike Davies
Andrew Lines
Jon Dama
Alain Gravel
Robert Southworth
Georgios D. Dimou
Peter A. Beerel
Published in:
ASYNC (2014)
Keyphrases
</>
delay insensitive
asynchronous circuits
case study
high speed
engineering design
optimal design
user interface
functional verification
knowledge based systems
computer aided
network devices