Wake-up latencies for processor idle states on current x86 processors.

Robert Schöne Daniel Molka Michael Werner

Published in: Comput. Sci. Res. Dev. (2015)

Keyphrases

parallel processing
single processor
high end
parallel algorithm
parallel architectures
instruction set
multiprocessor systems
neural network
response time
distributed memory
parallel processors
multi processor
data sets
high speed
processing elements