Macro Block Based FPGA Floorplanning.
Jianzhong ShiAkash RandharDinesh BhatiaPublished in: VLSI Design (1997)
Keyphrases
- field programmable gate array
- hardware implementation
- high speed
- real time image processing
- motion compensation
- fpga implementation
- low cost
- hardware design
- verilog hdl
- evolutionary search
- real time
- dedicated hardware
- signal processing
- hardware architecture
- motion estimation
- data acquisition
- reconfigurable hardware
- low power consumption
- fractal image compression
- software implementation
- single chip
- embedded systems
- wavelet transform
- digital signal
- parallel hardware
- systolic array
- computer vision