Fast FPGA emulation of background-calibrated SAR ADC with internal redundancy dithering.

Guanhua Wang Yun Chiu

Published in: CICC (2013)

Keyphrases

synthetic aperture radar
single chip
real time
high speed
internal and external
field programmable gate array
real time image processing
sar images
hardware implementation
low cost
multi view
structured light
stereo camera
multiscale
parameter estimation
black and white