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A Fully Parallel LDPC Decoder Architecture Using Probabilistic Min-Sum Algorithm for High-Throughput Applications.

Chung-Chao ChengJeng-Da YangHuang-Chang LeeChia-Hsiang YangYeong-Luh Ueng
Published in: IEEE Trans. Circuits Syst. I Regul. Pap. (2014)
Keyphrases
  • high throughput
  • computational complexity
  • dynamic programming
  • microarray
  • np hard
  • probabilistic model
  • real time
  • k means
  • data collection
  • segmentation algorithm
  • energy function
  • min sum