Gate sizing and buffer insertion for optimizing performance in power constrained BiCMOS circuits.

Kerry S. Lowe P. Glenn Gulak

Published in: ICCAD (1993)

Keyphrases

cmos technology
power consumption
power dissipation
mixed signal
power losses
chip design
power reduction
low power
multiple input
infrared
high speed
low cost
data structure
power saving
case study
logic synthesis
vlsi circuits
nano scale
data sets