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Minimizing total area of low-voltage SRAM arrays through joint optimization of cell size, redundancy, and ECC.
Shi-Ting Zhou
Sumeet Katariya
Hamid Reza Ghasemi
Stark C. Draper
Nam Sung Kim
Published in:
ICCD (2010)
Keyphrases
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joint optimization
low voltage
multiple description coding
random access memory
power line
design considerations
sparse representation
leakage current
computer vision
data sets
feature extraction
data streams
feature space
nearest neighbor