Supersystolic arrays on large-scale FPGA structures.

Surin Kittitornkun Yu Hen Hu

Published in: ISCAS (2) (2003)

Keyphrases

small scale
machine learning
hardware implementation
database
real time
neural network
artificial intelligence
computer vision
bayesian networks
low cost
high speed
hardware design
single chip
real time image processing
fpga implementation
digital signal