27.8 A 0.076mm2 12b 26.5mW 600MS/s 4×-interleaved subranging SAR-ΔΣ ADC with on-chip buffer in 28nm CMOS.
Alessandro VencaNicola GhittoriAlessandro BosiClaudio NaniPublished in: ISSCC (2016)
Keyphrases
- power consumption
- clock frequency
- nm technology
- cmos technology
- low power
- single chip
- metal oxide semiconductor
- synthetic aperture radar
- power dissipation
- silicon on insulator
- low voltage
- sar images
- analog to digital converter
- mixed signal
- power management
- low cost
- rms error
- wide dynamic range
- integrated circuit
- cmos image sensor
- buffer size
- power supply
- hd video
- ibm power processor
- low power consumption
- image sensor
- image reconstruction