Low-Power Motion Estimation Processor with 3D Stacked Memory.
Shuping ZhangJinjia ZhouDajiang ZhouShinji KimuraSatoshi GotoPublished in: IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (2015)
Keyphrases
- low power
- motion estimation
- high speed
- single chip
- gate array
- power consumption
- low cost
- power dissipation
- low complexity
- vlsi architecture
- high power
- digital signal processing
- image sequences
- video sequences
- optical flow
- logic circuits
- vlsi circuits
- video coding
- motion compensated
- wireless transmission
- inter frame
- motion compensation
- main memory
- motion vectors
- super resolution
- computational complexity
- power reduction
- video compression
- low power consumption
- parallel processing
- cmos technology
- computer vision
- signal processor
- nm technology
- real time
- multithreading
- frame rate
- mixed signal
- signal processing