22nm CMOS pW Standby Power Flip-Flops with/without Security using Dynamic Leakage Suppression Logic.

Duong Nghiep Huy Guowei Chen Kiichi Niitsu

Published in: LASCAS (2022)

Keyphrases

power dissipation
flip flops
power consumption
cmos technology
nm technology
chip design
low power
power reduction
digital signal processing
low cost
power management
low voltage
silicon on insulator
design methodology
modal logic
logic programming
delay insensitive
edge detection
real time
high speed