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High-Speed Adder Design Space Exploration via Graph Neural Processes.
Hao Geng
Yuzhe Ma
Qi Xu
Jin Miao
Subhendu Roy
Bei Yu
Published in:
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2022)
Keyphrases
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high speed
design space exploration
neural network
design space
low power
computer architecture
high level synthesis
hardware software partitioning
network architecture
design process
machine learning
expert systems
image segmentation
database systems
power consumption