Low-power ternary content-addressable memory design based on a voltage self-controlled fin field-effect transistor segment.
Yen-Jen ChangKun-Lin TsaiYu-Cheng ChengMeng-Rong LuPublished in: Comput. Electr. Eng. (2020)
Keyphrases
- low power
- single chip
- high speed
- vlsi architecture
- power consumption
- low cost
- low power consumption
- power dissipation
- cmos technology
- logic circuits
- gate array
- digital signal processing
- power reduction
- field effect transistors
- signal processing
- power supply
- energy dissipation
- vlsi circuits
- nm technology
- ultra low power