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An Efficient Design of Single Event Transients Tolerance for Logic Circuits.
Yantu Mo
Suge Yue
Published in:
DELTA (2008)
Keyphrases
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logic circuits
functional decomposition
low power
case study
user interface
design process
low cost
signal processing
multistage
heuristic search
event detection
efficient implementation
design methodology
power dissipation
tunnel diode
gate array