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Improving performance of FPGA-based SR-latch PUF using Transient Effect Ring Oscillator and programmable delay lines.
Amir Ardakani
Shahriar B. Shokouhi
Arash Reyhani-Masoleh
Published in:
Integr. (2018)
Keyphrases
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steady state
super resolution
hough transform
general purpose
limit cycle
power consumption
low cost
line drawings
low power
electronic devices
high density
sparse representation
embedded systems
hardware implementation
application specific
critical path
neural network