Live Demonstration: An Efficient Neural Network Processor with Reduced Data Transmission and On-chip Shortcut Mapping.
Yichuan BaiZhuang ShaoChenshuo ZhangAojie JiangYuan DuLi DuPublished in: AICAS (2023)
Keyphrases
- data transmission
- neural network
- high speed
- data acquisition
- single chip
- wireless sensor networks
- data transfer
- communication networks
- energy consumption
- functional verification
- computer networks
- chip design
- multi hop
- ibm power processor
- base station
- routing protocol
- processor core
- real time
- transmission delay
- error detection and correction
- monitoring system
- data delivery
- database
- low cost
- sensor networks
- sensor nodes
- peer to peer
- information systems
- level parallelism
- databases