A Novel Gate-Level On-Chip Crosstalk Noise Reduction Circuit for Deep Sub-micron Technology.
Swatilekha MajumdarPublished in: VDAT (2019)
Keyphrases
- cmos technology
- noise reduction
- low power
- power consumption
- low voltage
- edge preserving
- power dissipation
- signal to noise ratio
- parallel processing
- edge detection
- noisy environments
- nm technology
- high speed
- noise removal
- low cost
- median filter
- noise level
- silicon on insulator
- image sensor
- edge enhancement
- noise filtering
- speech enhancement
- noise free
- digital signal processing
- edge preservation
- wiener filter