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A distributed interleaving scheme for efficient access to WideIO DRAM memory.
Ciprian Seiculescu
Luca Benini
Giovanni De Micheli
Published in:
CODES+ISSS (2012)
Keyphrases
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main memory
lightweight
random access
limited memory
distributed systems
multi agent
data model
access control
memory requirements
communication cost
high density
data transfer
read write
dynamically created