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A programmable VLSI array with constant I/O pins.
Mokhtar Aboelaze
De-Lei Lee
Benjamin W. Wah
Published in:
Algorithms and Parallel VLSI Architectures (1991)
Keyphrases
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processor array
parallel algorithm
input output
parallel implementation
single chip
mesh connected
power supply
low cost
parallel computers
data structure
data transfer
high density
main memory
programmable logic
garbage collection
signal processing
learning algorithm