A high speed BIST architecture for DDR-SDRAM testing.

Sheng-Chih Shen Hung-Ming Hsu Yi-Wei Chang Kuen-Jong Lee

Published in: MTDT (2005)

Keyphrases

high speed
real time
management system
low power
distributed architecture
artificial intelligence
case study
network architecture
database
data sets
data mining
software architecture
formal model
design methodology
reference model
high speed networks