Customizable and High Performance Matrix Multiplication Kernel on FPGA (Abstract Only).

Jie Wang Jason Cong

Published in: FPGA (2015)

Keyphrases

matrix multiplication
distributed memory
message passing
low power consumption
kernel function
field programmable gate array
low cost
high speed
kernel methods
hardware implementation
shared memory
feature space
parallel implementation
support vector
image sequences
signal processing
parallel machines
real time