An accelerator-based wireless sensor network processor in 130nm CMOS.
Mark HempsteadGu-Yeon WeiDavid M. BrooksPublished in: CASES (2009)
Keyphrases
- wireless sensor networks
- high speed
- silicon on insulator
- ibm power processor
- single chip
- cmos technology
- parallel processing
- nm technology
- power consumption
- metal oxide semiconductor
- low power
- sensor networks
- random access memory
- energy consumption
- dynamic random access memory
- low cost
- sensor nodes
- energy efficient
- energy efficiency
- image sensor
- parallel implementation
- resource constrained
- power supply
- parallel processors
- cmos image sensor
- chip design
- data transmission
- computer architecture
- embedded dram
- routing algorithm
- error resilience
- energy saving
- vlsi circuits
- compute intensive
- resource limitations
- ibm zenterprise
- distributed memory
- low voltage
- instruction set
- circuit design
- routing protocol