Scalable interconnection networks for partial column array processor architectures.

Jarmo Takala David Akopian Jaakko T. Astola Jukka P. Saarinen

Published in: ISCAS (2000)

Keyphrases

interconnection networks
array processor
fault tolerant
semantic network
multistage
scan line
routing algorithm
parallel algorithm
message passing
parallel computers
graphical models
computer vision
multi view
semantic relations
information flow