3-D VLSI technology in Japan and an example: a syndrome decoder for double error correction.

Takakazu Kurokawa Hideo Aiso

Published in: Future Gener. Comput. Syst. (1988)

Keyphrases

error correction
ldpc codes
error control
reed solomon
error detection
noisy channel
turbo codes
error correcting
channel coding
low density parity check
data hiding
error detection and correction
error resilient
watermarking scheme
computational complexity
vlsi architecture
error concealment
low complexity