A novel CMOS double-edge triggered flip-flop for low-power applications.
Yu-Yin SungRobert C. ChangPublished in: ISCAS (2) (2004)
Keyphrases
- low power
- power dissipation
- cmos technology
- flip flops
- power consumption
- high speed
- low cost
- single chip
- low voltage
- image sensor
- logic circuits
- vlsi circuits
- high power
- digital signal processing
- mixed signal
- edge detection
- vlsi architecture
- cmos image sensor
- ultra low power
- low power consumption
- power reduction
- nm technology
- multiple input
- parallel processing
- digital images
- image processing