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A Hierarchical Track and Hold Circuit for High Speed ADC-Based Receivers in 22nm FDSOI.

David CordovaWim CopsYann DevalFrancois RivetHervé LapuyadeNicolas NodenotYohan Piccin
Published in: ICECS (2019)
Keyphrases
  • high speed
  • low power
  • cmos technology
  • metal oxide
  • real time
  • hierarchical structure
  • high speed networks
  • frame rate
  • power reduction
  • wireless sensor networks
  • mathematical model
  • focal plane
  • nm technology