VLSI architecture of digital matched filter and prime interleaver for W-CDMA.
Yoshihiro UchidaMasanao IseTakao OnoyeIsao ShirakawaItthichai ArungsrisangchaiPublished in: ISCAS (3) (2002)
Keyphrases
- vlsi architecture
- matched filter
- ds cdma
- vlsi implementation
- signal to noise ratio
- low complexity
- low power
- real time
- wavelet transform
- noise model
- target detection
- hyperspectral imagery
- bit error rate
- spread spectrum
- channel coding
- code division multiple access
- base station
- error correction
- multipath
- power consumption
- high speed
- multiresolution
- computer vision
- image compression
- image data
- image processing