Faster Software Packet Processing on FPGA NICs with eBPF Program Warping.
Marco BonolaGiacomo BelocchiAngelo TulumelloMarco Spaziani BrunellaGiuseppe SiracusanoGiuseppe BianchiRoberto BifulcoPublished in: USENIX Annual Technical Conference (2022)
Keyphrases
- hardware design
- real time image processing
- reconfigurable hardware
- real time
- test cases
- software development
- program understanding
- programming environments
- field programmable gate array
- software implementation
- software systems
- dedicated hardware
- image processing
- java programs
- parallel architecture
- static analysis
- data acquisition
- computer systems
- data processing
- high speed
- hardware description language
- hardware implementation
- signal processing
- user interface
- hardware designs
- packet loss
- embedded systems
- computer hardware
- search based software testing
- control flow
- programming environment
- image processing algorithms
- computational power
- software maintenance
- end to end