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Accelerating H.264/HEVC video slice processing using application specific instruction set processor.
Dipan Kumar Mandal
Mihir Mody
Mahesh Mehendale
Naresh Yadav
Ghone Chaitanya
Piyali Goswami
Hetul Sanghvi
Niraj Nandan
Published in:
ICCE (2015)
Keyphrases
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instruction set
application specific
computation intensive
general purpose
real time
level parallelism
video data
video sequences
instruction set architecture
ibm power processor
video content
high bandwidth
file system
memory subsystem
high volume
floating point
video codec
video compression
low cost