Sign in
Asymmetric underlapped FinFET based robust SRAM design at 7nm node.
A. Arun Goud
Rangharajan Venkatesan
Anand Raghunathan
Kaushik Roy
Published in:
DATE (2015)
Keyphrases
</>
case study
design process
building blocks
power consumption
engineering design
design methodology
design considerations
database
real time
software engineering
high speed
energy consumption
computer aided
design tools