A Flexible Tradeoff Between Code Size and WCET Using a Dual Instruction Set Processor.

Sheayun Lee Jaejin Lee Chang Yun Park Sang Lyul Min

Published in: SCOPES (2004)

Keyphrases

instruction set
instruction set architecture
floating point
computer architecture
application specific
computational complexity
embedded systems
level parallelism
ibm power processor
source code
low cost
data processing
computer systems
memory subsystem
general purpose