Calling hardware procedures in a reconfigurable accelerator using RPC-FPGA.
Erik H. D'HollanderBruno ChevalierKoen De BosscherePublished in: FPT (2017)
Keyphrases
- field programmable gate array
- hardware implementation
- embedded systems
- programmable logic
- hardware design
- hardware architecture
- fpga implementation
- image processing algorithms
- computing systems
- parallel computing
- software implementation
- reconfigurable hardware
- low cost
- digital signal processing
- digital signal processors
- massively parallel
- fpga technology
- general purpose processors
- hardware software
- fpga device
- xilinx virtex
- parallel architectures
- signal processing
- pipelined architecture
- hardware software co design
- image processing
- hw sw
- high end
- hardware description language
- software systems