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Power-conscious interconnect buffer optimization with improved modeling of driver MOSFET and Its implications to bulk and SOI CMOS technology.
Koichi Nose
Takayasu Sakurai
Published in:
ISLPED (2002)
Keyphrases
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power dissipation
power consumption
cmos technology
silicon on insulator
low power
power management
low voltage
clock frequency
high speed
digital signal processing
low cost
spl times
energy saving
ibm power processor
pattern recognition
design methodology
optical flow
mixed signal