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A compact low-power mixed-signal architecture for powerline interference rejection in biopotential analog front ends.
Pakorn Prasopsin
Bhirawich Pholpoke
Samattachai Tepwimonpetkun
Woradorn Wattanapanitch
Published in:
BioCAS (2014)
Keyphrases
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mixed signal
low power
vlsi circuits
power consumption
low cost
high speed
multi channel
vlsi architecture
cmos technology
single chip
digital circuits
signal processor
logic circuits
energy efficiency
power reduction
digital signal processing
low power consumption
gate array