A 100MS/s 9-bit Companding SAR ADC with On-Chip Input Driver in 65nm CMOS for Multi-Carrier Communications.
Anindya SahaSaurabh ChaubeyRamesh HarjaniPublished in: MWSCAS (2018)
Keyphrases
- analog to digital converter
- nm technology
- random access memory
- cmos technology
- single chip
- analog vlsi
- low power
- high speed
- image sensor
- power consumption
- silicon on insulator
- cmos image sensor
- low cost
- mixed signal
- metal oxide semiconductor
- embedded dram
- circuit design
- communication systems
- chip design
- dynamic range
- synthetic aperture radar
- input data
- communication networks
- parameter estimation